Design and Simulation of PFC Circuit for AC/DC ...
URL: http://www.ijape.org/paperInfo.aspx?ID=1781
In this paper a simple power factor correction PFC circuit was designed, simulated and tested for AC/DC converter which generates input current harmonics due to its non-linear characteristics. PFC was achieved through current harmonics mitigation by using PWM boost regulator. The circuit utilizes the charging and disc arching increments of boost inductor current to shape a sinusoidal input current. Inductor current was controlled by means of PWM controller. The controller accepts two feed back signals, the first is the inductor current and the other is the output voltage of the AC/DC converter. The simulation results of fast fourier transform FFT show a grate reduction in current harmonic which in turns tends to a grate improvement in power factor.
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Additional Information
| Field | Value |
|---|---|
| Last updated | unknown |
| Created | unknown |
| Format | unknown |
| License | Other (Open) |
| Created | over 12 years ago |
| id | f7251ff4-1d0b-4819-a228-cd0c91f3b800 |
| package id | 7880ed29-9141-420c-9807-08e2f3a7d906 |
| position | 19 |
| resource type | file |
| revision id | e84b6519-4481-447d-8668-3a97dcf999c3 |
| state | active |
